Development Of A Low-Cost Digital Logic Training Module for Students Laboratory Experiments

Abstract

Digital systems have become widely spread, and commonly applicable recently in most of our domestic and office devices like computers, portable digital devices, mobile phones, television, air conditioning, most of industrial machines and motor vehicles. A low-cost digital logic training module for the student’s laboratory experiment was designed and realized to simplify the problems of the learner in the study courses like basic electronics, digital logic systems, and computer architecture and so on. The primary goal of this paper was to describe the development and application of an inexpensive digital logic training module prototyping, for hands-on laboratory students’ experimentation and research improvement. The duty circle waveform timing sequence for the Digital Logic Training Module (DLTM) was calculated as D, which gives an approximately result of 0.5 seconds. This gives an insight to any students or researcher interested in the development of an economical logic trainer module or related embedded system development. The system features gives advantages of learn-while-doing to compensate the students theoretical knowledge, assist researcher to validate the logical proof and circuit design in the practical exercise related to the basic and derive logic gates (BDLG), combinational logic circuit (CLC) and sequential logic circuit (SLC).