IMPLEMENTATION OF MINIMIZED MARCH SR ALGORITHM IN A MEMORY BIST CONTROLLER

Authors

  • A. Z. Jidin Universiti Teknikal Malaysia Melaka, Universiti Malaysia Perlis
  • R. Hussin Universiti Malaysia Perlis
  • M. S. Mispan Universiti Teknikal Malaysia Melaka
  • W. F. Lee Emerald System Design Center
  • N. A. Zakaria HCL Technologies Malaysia

Abstract


Memory Built-In Self-Test (MBIST) is essential in testing memories on a chip. Its efficiency depends on its fault coverage and the complexity of the algorithm used, which defines the test sequence to be applied to every cell of the memory under the test. This paper presents the implementation of a minimized-complexity March SR algorithm in an MBIST controller for detecting unlinked static faults in an SRAM. It was implemented as a User-Defined Algorithm (UDA), which was hard-coded in the MBIST controller. The simulations validated its functionality and fault detection ability, producing similar fault coverage as the initial March SR algorithm with a shorter test completion time.

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Author Biography

A. Z. Jidin, Universiti Teknikal Malaysia Melaka, Universiti Malaysia Perlis

SENIOR LECTURER, 

DEPT OF ELECTRONIC & COMPUTER TECHNOLOGY ENGINEERING,

FACULTY OF ELECTRICAL AND ELECTRONICS ENGINEERING TECHNOLOGY,

UTeM

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Published

2023-02-14

How to Cite

A. Z. Jidin, R. Hussin, M. S. Mispan, W. F. Lee, & N. A. Zakaria. (2023). IMPLEMENTATION OF MINIMIZED MARCH SR ALGORITHM IN A MEMORY BIST CONTROLLER. Journal of Engineering and Technology (JET), 13(2), 67–80. Retrieved from https://jet.utem.edu.my/jet/article/view/6312

Issue

Vol. 13 No. 2 (2022): JOURNAL OF ENGINEERING AND TECHNOLOGY

Section

Articles

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Copyright (c) 2023 Journal of Engineering and Technology (JET)

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